test date:22/08/06,Tuesday
Registers
Memory map
memory address decoding using NAND gates, Decoders
Tristate Devices
comparison b/w microprocessor & microcontroller
instruction cycle,machine cycle,T-state
Timing diagram of Memory read, opcode fetch,
control signals: RD-,WR-,IO/M-,ALE,EA-,RST,PSEN-
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