test date:24/08/06, Thursday
8085 programming model- ie. the programmable registers in 8085
8085,8051 addressing modes:definition,egs
RAM memory space allocation in 8051,
Register bank select:PSW.4,PSW.5 bits
Stacks in 8085 and 8051 - PUSH and POP instruction
How does an 8085 based single board micrcocomputer(ie is a microprocessor trainer kit) work? - read the section from Ramesh S.Goankar's text (Section 3.6) and appendix B
Sunday, August 20, 2006
Topics for test 2
test date:22/08/06,Tuesday
Registers
Memory map
memory address decoding using NAND gates, Decoders
Tristate Devices
comparison b/w microprocessor & microcontroller
instruction cycle,machine cycle,T-state
Timing diagram of Memory read, opcode fetch,
control signals: RD-,WR-,IO/M-,ALE,EA-,RST,PSEN-
Registers
Memory map
memory address decoding using NAND gates, Decoders
Tristate Devices
comparison b/w microprocessor & microcontroller
instruction cycle,machine cycle,T-state
Timing diagram of Memory read, opcode fetch,
control signals: RD-,WR-,IO/M-,ALE,EA-,RST,PSEN-
Tuesday, August 15, 2006
Monday, August 14, 2006
Welcome
This blog intends to serve as a online resource for the paper Microcontroller Based System Design
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